• Deeproute.ai Silicon Development team is looking for a Senior, Staff, or Senior Staff Design Verification Engineer to develop and manage the verification and test environments. We are looking for the best talent to work on state-of-art chip designs, where your limit is only your imagination. As a Design Verification, you will need to be passionate about developing AI Chips. You will work with highly talented engineers and have an excellent opportunity to verify the next-generation chips for autonomous vehicles.

Responsibilities

• Define and review verification and validation testplans at both the unit and integration levels.
  
• Review and aid in developing the RTL design architecture and specification.
• Verify design functionality through writing reusable and scalable testbenches, scoreboards, assertions, and assembly tests.
• Execute coverage of various use cases, then feed back to the testplans for closure.
• Integrate your IP or block into higher-level testbenches, then perform cluster/integration level testing.
• Develop and maintain regressions, tools, infrastructure, and methodology.
• Have strong communication skills combined with good team-oriented approaches to lead the verification efforts in a specific area of the design.

Requirements

• BS or MS degree in Electrical or Computer Engineering, Computer Science, or related field with 10+ years of industry work experience.
  
• 5+ years of work experience in designing, verifying, and validating complex hardware systems.
• Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
• Proficient in debugging CPU, GPU, fabric, NOC, memory, various protocols like PCIe or Ethernet, or other complex ASIC designs.
• Knowledge of industry-standard interfaces, advanced computer architecture, and micro-architecture concepts.
• Good team player with strong problem-solving and communication skills, and a desire to take on diverse challenges.
• Able to work independently in a fast-paced team and environment.
• Familiar with Scripting Languages: Perl/Python/TCL.

Desirable Experience

• Deep knowledge of architecture including CPU, GPU, fabrics, interconnects, NOC, bus protocols (AXI/APB), PCIe, Ethernet, DMA, AI-engines, accelerators, CSRs, SerDes, PHY, etc.
• Experience with hardware-software interaction, and software application testing on the chip.
• Emulation/FPGA experience is a plus.
• Post-silicon bring-up and validation experience is a plus.